Signal select window

General Description

The signal select window is used to select signals, which you want to display in the Signals window to view it's content over time (waveforms). The signals are presented in a tree. The members of the tree are the loaded modules, such as Instruction Set Simulators or HDL designs. Signals from different modules can be dragged and dropped in the same Signals window.

Netlist signals are used to connect a bus model to an HDL design or to connect signals from a C++ model (peripheral) to another module. Built in programmable signal generators are available to apply stimuli.




Select signal and drag and drop it into the Signals window to view waveform data
Add or remove signals to a named group of signals
Connect a stimuli generator to a signal and specify the stimuli
Show relation between program counter and a specified memory address range
Show signals of CPU's and HDL designs in the same Signals window
For all your high-speed SW/HW co-verification tools
Copyright 2002-2022 Adveda B.V. - E-mail: - Tel: +31 624 504 862